Cache memory (8pts) consider adding cache to a processor-memory system design. the microprocessor without cache needs 12 clock cycles to read a 16-bit word from the memory. with cache, it takes only 4 clock cycles if the data happens to be in the cache and a total 20 clock cycles including the cache misses. a. what is the performance ratio of the cache system to the non-cache system given a hit rate of 80%? b. for what hit rate will these two design achieve identical performance? c. for what hit rate will the cache design perform 2 times as fast as the non-cache design? d. if the clock frequency is 4mhz, what is the minimal hit rate to make the average memory access time no greater than 2 μs?