Agiven fpga board uses a 2 gigahertz clock. design, and implement in simulink, a circuit for this board (using a hdl counter with appropriate number of cycles) that generates 2 hertz pwm signal with a 10-90 duty cycle. you can use counters and comparators in simulink. explain your design and provide scope captures of your output signal. (for simulation purposes, you can scale down the number of cycles and indicate in the homework what the actual values are and how you scaled them down.)

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Consider the following declarations (1, 2, 3, 5, 7)class bagtype{public: void set(string, double, double, double, double); void print() const; string getstyle() const; double getprice() const; void get(double, double, double, double); bagtype(); bagtype(string, double, double, double, double); private: string style: double l; double w; double h; double price; }; a.) write the definition of the number function set so that private members are set according to the parametersb.) write the definition of the member function print that prints the values of the data membersc.) write the definition of the default constructor of the class bagtype so that the private member variables are initialized to "", 0.0, 0.0, 0.0, 0.0, respectively d.) write a c++ statement that prints the value of the object newbag.e.) write a c++ statement that declares the object tempbag of type bagtype, and initialize the member variables of tempbag to "backpack", 15, 8, 20 and 49.99, respectively