P1 has a clock rate of 4 GHz, average CPI of 0.9, and requires the execution of 5.0E9 instructions.
P2 has a clock rate of 3 GHz, an average CPI of 0.75, and requires the execution of 1.0E9 instructions.
1.12.1 [5] <§§1.6, 1.10> One usual fallacy is to consider the computer with the
largest clock rate as having the largest performance. Check if this is true for P1 and P2.
1.12.2 [10] <§§1.6, 1.10> Another fallacy is to consider that the processor executing
the largest number of instructions will need a larger CPU time. Considering that
processor P1 is executing a sequence of 1.0E9 instructions and that the CPI of
processors P1 and P2 do not change, determine the number of instructions that P2
can execute in the same time that P1 needs to execute 1.0E9 instructions.
1.12.3 [10] <§§1.6, 1.10> A common fallacy is to use MIPS (millions of
instructions per second) to compare the performance of two different processors,
and consider that the processor with the largest MIPS has the largest performance.
Check if this is true for P1 and P2.
1.12.4 [10] <§1.10> Another common performance figure is MFLOPS (millions
of floating-point operations per second), defined as
MFLOPS = No. FP operations / (execution time × 1E6)
but this figure has the same problems as MIPS. Assume that 40% of the instructions
executed on both P1 and P2 are floating-point instructions. Find the MFLOPS
figures for the programs.