Problem 4 (25 points)Consider a byte addressing architecture with 64-bit memory addresses.(a)Which bits of the address would be used in the tag, index and offset in a direct-mapped cache with 512 1-word blocks. 3(b)Which bits of the address would be used in the tag, index and offset in a direct-mapped cache with 64 8-word blocks.(c)What is the ratio of bits used for storing data to total bits stored in the cache in each of the above cases

Following are the solution to the given points:

Explanation:

The Memory address value = 64 bit

The Size of the word

In point a:

The offset size ( in 1-word block size)  

The Index size (as block number =512)  

Tag size

In point b:

The offset size

The Index size

Tag size  

In point c:

The Ratio at point a  

The Ratio at point b

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