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Create an FSM that has an input X and an output Y. Whenever X changes from 0 to 1, Y should become 1 for five clock cycles and then return to 0 -- even if X is still 1. Using the process for designing a controller, convert the FSM to a controller, implementing the controller using a state register and logic gates.

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Create an FSM that has an input X and an output Y. Whenever X changes from 0 to 1, Y should become 1...
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