Consider the following three CPU organizations:
CPU SS: A 2-core superscalar microprocessor that provides out-of-order issue capabilities on 2 functional units (FUs). Only a single thread can run on each core at a time.
CPU MT: A fine-grained multithreaded processor that allows instructions from two threads to be run concurrently (i. e., there are two functional units), though only instructions from a single thread can be issued on any cycle.
CPU SMT: An SMT processor that allows instructions from 2 threads to be run concurrently (i. e., there are two functional units), and instructions from either or both threads can be issued to run on any cycle. Assume we have two threads X and Y to run on these CPUs that include the following operations:Thread 1Thread 2A1 - takes 3 cycles to executeA2 - no dependenciesA3 - conflicts for a functional unit with A1A4 - depends on the result of A3B1 - takes 2 cycles to executeB2 - conflicts for a functional unit with B1B3 - depends on the result of B2B4 - no dependencies and takes 2 cycles to executeAssume all instructions take a single cycle to execute unless noted otherwise or they encounter a hazard.2.a) Assuming that you have 1 SS CPU, how many cycles will it take to execute these two threads? How many issue slots are wasted due to hazards?2.b) Assuming you have 1 MT CPUs, how many cycles will it take to execute these two threads? How many issue slots are wasted due to hazards?2.c) Assuming you have 1 SMT CPU, how many cycles will it take to execute these two threads? How many issue slots are wasted due to hazards?