What is the data flow?

Problems: 1. using textbooks, reference books, and internet as your source of research, draw the following microprocessor microarchitectures i. intel 8086 ii. motorola 68000 i atmel atmega32 iv. mips single cycle v. arm cortex-m3 write an hdl module for a hexadecimal seven-segment display decoder. the input is 4-bit binary representing a hex number (0-f), and the output is 8-bit seven segment display bits (a-h). thus, the decoder must handle the digits 10 - 15 to display a-f respectively, in addition to 0-9 numbers. 2. design a 4-bit left and right rotator (both outputs). first sketch schematic diagrams of your design. then implement your design using hdl coding. 3. 4. design a modified priority encoder that receives an 8-bit input, a7: 0 and produces a 3-bit output, y2o. y indicates the most significant bit of the input that is true. y should be 0 if none of the inputs are true. give a simplified boolean equation, sketch a schematic, and write an hdl code. 5.write an 8: 1 multiplexer module called mux8 with selection inputs s, data input d, and data output y. data input (d) and data output (v) are 32-bit wide

Is a string of code written to hurt others by damaging or destroying

Consider a direct-mapped cache with 216 words in main memory. the cache has 16 blocks of 8 words each. it is a word-addressable computer (rather than a byte-addressable computer which we normally discuss). (a) how many blocks of main memory are there? (b) what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, cache block, and block offset fields (if they apply)? (c) to which cache block will the memory reference db6316 map?