What is the purpose of an internet protocol address (ip address)? it specifies whether a computer is using a broadband network or a direct-dial network. it differentiates between a server computer and a client computer and contains codes to identify whether the computer can send data or receive data. it contains the protocol schema used to identify whether the computer is on a wired or wireless network. it uniquely identifies the location of each computer or device connected to the internet?

Peripherals are part of the main computer. true false

Check my work the microprocessor is a(n) circuit, which is designed to process data based on a set of instructions. most desktop and laptop devices contain a microprocessor based on the standard. most tablets and smartphones contain processors based on technology. a microprocessor's circuitry is designed to perform a limited number of tasks contained in its set. during processing, an instruction is loaded into the processor's unit. data is loaded into registers in the processor's where arithmetic and logic operations are performed. microprocessor performance can be measured by its speed. other factors affecting overall processing performance include word size, cache size, and instruction set complexity. most digital devices contain only one microprocessor chip, but today's multi- processors contain circuitry that supports parallel processing. computers contain various kinds of memory. random memory is a special holding area for data, program instructions, and the system. it stores data on a temporary basis until the processor makes a data request. ram is different from disk storage because it is , which means that it can hold data only when the computer power is turned on. computers also contain read- memory, which is a type of non-volatile memory that provides a set of "hard-wired" instructions, called the loader, that a computer uses to boot up.

Suppose we have a byte addressable computer that has a 32-byte cache with 8 bytes per block. the memory address is 8 bits long. the system accesses memory addresses (in hex) in this exact order: 6e, b9, 17, e0, 4e, 4f, 50, 91, a8, ab, ad, 93, and 94. (a) assuming the cache is direct mapped, what memory addresses will be in cache block 2 after the last address has been accessed? (b) assuming the cache is direct mapped, what is the hit ratio for the entire memory reference sequence given, assuming the cache is initially empty? (c) assuming the cache is 2-way set associative with a lru replacement policy, what is the hit ratio?