Design a digital system with three 16-bit registers AR, BR, and CR and 16-bit data input IN to perform the following operations assuming a two's complement representation and ignoring overflow: a) Transfer two 16-bit signed numbers to AR and BR on successive clock cycles after a go signal G is enabled. b) If the number in AR is positive but nonzero, multiply the contents of AR by two and transfer the result to register CR. c) If the number in AR is negative, multiply the contents of BR by two and transfer the result to register CR. d) If the number in AR is zero, reset register CR to 0.