subject

Compute the overall (Cache) performance CPU: A processor runs at 3.0 GHz and has a CPI=1.5 for a perfect cache (i. e. without including the stall cycles due to cache misses). Assume that load and store instructions are 25% of the instructions. The processor has an I-cache (Instruction – cache) with a 5% miss rate and a Dcache (Data memory cache) with 4% miss rate. The hit time is 1 clock cycle for both caches.
Assume that the time required to transfer a block of data from the main memory to the cache, i. e. miss penalty, is 40 ns.
a. Compute the number of stall cycles per instruction
b. Compute the overall (cycle per instruction) CPI
c. Compute the average memory access time (AMAT) in ns.

ansver
Answers: 1

Another question on Computers and Technology

question
Computers and Technology, 21.06.2019 13:20
Raymond ozzie, the software designer who was critical in the development of lotus notes, was able to dictate the terms under which ibm acquired lotus. this illustrates that he had bargaining power based on the cost required by the firm to replace him.
Answers: 3
question
Computers and Technology, 22.06.2019 19:30
Singing in the rain: this first part of the film shows the early history of motion picture. how accurate do you think the portrayal of the early motion picture industry is? why? is historical accuracy important in films and theater productions? explain.
Answers: 1
question
Computers and Technology, 22.06.2019 23:50
You need to design a circuit that implements the functions in the following table: s0 s1 function0 0 a + 10 1 a – b1 0 a + b1 1 a – 1s0 and s1 are 1-bit control inputs to select the function of the circuit. inputs a and b are 4-bitnumbers in 2s complement form. the output is also a 4-bit number in 2s complement form.you are allowed to use only one ttl 7483 4-bit adder to implement all the functions. but anynumber of other components (except the adder) can be used.hint: design a combinational logic circuit to modify the input b and the “carry input” of theadder depending on the control inputs s0 and s1.important: lab grade will depend on the working of the circuit & will be checked of by your labinstructor.1. is the output valid for the following input combinations: a. s0 = 0, s1 = 0, a = 7, b = 3? b. s0 = 0, s1 = 1, a = 7, b = 3? c. s0 = 1, s1 = 0, a = -4, b = -5? d. s0 = 1, s1 = 1, a = -8, b = 6? 2. what is the range of inputs (for both a and b) that will produce the valid output for all the functions?
Answers: 3
question
Computers and Technology, 23.06.2019 04:00
Another name for addicting games.com
Answers: 1
You know the right answer?
Compute the overall (Cache) performance CPU: A processor runs at 3.0 GHz and has a CPI=1.5 for a pe...
Questions
Questions on the website: 13722367