Correct any mistakes in your two schematics that you encountered during the construction and operation of your two circuits (with and without the switch debouncing circuit). 2. Use the data you took during the lab session (in tabular form) to write a brief discussion of the effectiveness of the switch debouncing circuit based on the data. 3. Given that the debouncing circuit is somewhat expensive in terms of hardware (2 NAND gates, 2 resistors, and a double-pole, single throw switch), describe applications where you would require switch-debouncing circuits as well as applications where you would not need to include the additional hardware for switch debouncing (in other words, applications where you can tolerate switch bouncing). Note, you cannot use the clock and clear inputs of our lab as example applications; instead you need to think of other examples. 4. Finally, evaluate this lab exercise in terms of its value added to your understanding of digital logic circuits. Include any suggestions you have to improve this lab for subsequent semesters.